MOSFET Design Basics: First-Pass Sizing

This article explains how to do a first-pass MOSFET design: you start with the required voltage and current ratings, then choose a device and set the gate drive and heatsinking so the transistor stays within its safe operating area. You get a step-by-step sizing method that works for a switch in a DC-DC converter, a motor driver, or a load switch, with the key formulas and the common pitfalls that cause first prototypes to fail.

Formula

The two dominant loss terms in a hard-switched MOSFET are conduction loss and switching loss. Conduction loss is simply:

P_COND = I_LOAD² × R_DS(on)

where I_LOAD is the RMS current through the drain (A) and R_DS(on) is the drain-source resistance at the actual gate voltage and junction temperature (Ω). Switching loss for a resistive or inductive load with linear switching is approximated by:

P_SW ≈ 0.5 × V_IN × I_LOAD × (t_rise + t_fall) × f_SW

where V_IN is the off-state drain voltage (V), t_rise and t_fall are the switching times (s), and f_SW is the switching frequency (Hz). In the calculator above, the switching loss uses a typical total switching time of 20 ns – a reasonable first guess for a small logic-level MOSFET with a decent gate driver, but you should replace it with the real rise/fall times from the datasheet once you pick a part.

Worked Example

Using the defaults: V_IN = 12 V, I_LOAD = 5 A, V_GS = 10 V, R_DS(on) = 20 mΩ, f_SW = 100 kHz.

Step 1 – conduction loss: P_COND = 5² × 0.020 = 25 × 0.020 = 0.50 W.

Step 2 – switching loss: P_SW = 0.5 × 12 × 5 × (20×10^-9) × 100,000 = 0.5 × 12 × 5 × 0.002 = 0.06 W.

Step 3 – total loss: P_TOT = 0.50 + 0.06 = 0.56 W.

The calculator shows 0.56 W total. That is the heat you must remove from the junction. With a typical junction-to-ambient thermal resistance of 62 °C/W for a small SOT-23 package, the junction would rise 0.56 × 62 ≈ 35 °C above ambient – acceptable for a 25 °C room, but marginal in a 60 °C enclosure. If the ambient is 70 °C, you need a bigger package or a lower R_DS(on) part.

MOSFET Basics: What You Are Actually Designing

A MOSFET is a voltage-controlled switch. The gate-source voltage creates an electric field that forms a conductive channel between drain and source. In an enhancement-mode N-channel MOSFET (the most common type in power electronics), the device is off when V_GS = 0 and turns on when V_GS exceeds the threshold voltage V_TH. The three terminals are gate (G), drain (D), and source (S). Current flows from drain to source when the channel is on, and the device blocks voltage when off.

Your first-pass design job is to pick a device that:

• Blocks the maximum drain-source voltage with margin (usually 1.5–2× the maximum input voltage).
• Carries the peak and RMS current without exceeding the maximum junction temperature.
• Switches fast enough for your frequency without excessive loss.
• Can be driven by your gate voltage (logic-level vs. standard threshold).
• Fits your board area and budget.

Choosing the Right MOSFET: Key Electrical Ratings

Start with the absolute maximum ratings, then move to thermal and switching performance.

• V_DS (drain-source voltage): Must exceed the highest voltage the drain will see, including transients. If your 12 V bus can spike to 40 V during load dump, a 30 V part is too close – use a 60 V part.
• I_D (continuous drain current): The datasheet value is often specified at 25 °C case temperature; at 100 °C it can be half that. Use the thermal limit, not the package limit.
• R_DS(on): Specified at a particular V_GS (e.g., 10 V, 4.5 V, or 2.5 V). It rises with temperature – typically 1.5–2× at 125 °C junction. If you drive the gate with 3.3 V from a microcontroller, you need a logic-level MOSFET with R_DS(on) specified at 2.5 V or 1.8 V.
• V_GS(th) (threshold): The gate voltage where conduction begins. It is not the voltage for low R_DS(on) – you need to be well above it (usually 2–3×).
• Q_g (total gate charge): Determines how much current your gate driver must supply to switch quickly. A larger die gives lower R_DS(on) but higher Q_g – the classic trade-off.

Gate Drive: The Part Most People Get Wrong

The MOSFET gate is a capacitor. To turn the device on quickly, you must charge that capacitance fast. If you connect the gate directly to a microcontroller pin, the pin can only source a few milliamps, so the rise time becomes tens of microseconds – causing huge switching loss and possible oscillation. A proper gate driver IC (or a discrete push-pull transistor pair) can source and sink 1–4 A, giving rise/fall times of 10–50 ns.

For a first-pass design, calculate the average gate drive current: I_GATE = Q_g × f_SW. For example, a MOSFET with Q_g = 30 nC at 100 kHz needs 3 mA average, but the peak current during switching is much higher – that is why you need a driver, not just a resistor. Also add a series resistor (typically 2–10 Ω) between the driver and the gate to damp ringing, especially if there is any stray inductance in the layout.

Thermal Design: Keeping the Junction Cool

The junction temperature must stay below the absolute maximum (usually 150 °C or 175 °C) with margin. The thermal path is: junction → case → heatsink/PCB → ambient. Each step has a thermal resistance in °C/W. The total temperature rise is:

T_J = T_A + P_TOT × (R_θJC + R_θCS + R_θSA)

For a surface-mount MOSFET, the PCB copper is the heatsink. A single SOT-23 with minimal copper might have R_θJA of 200 °C/W; a D2PAK on a large copper pour can be 40 °C/W. For 0.56 W, a SOT-23 would rise 112 °C – too hot. A D2PAK would rise only 22 °C – fine. Always check the thermal resistance for the specific package and copper area in the datasheet.

Common First-Pass Mistakes

• Using R_DS(on) at 25 °C: At 100 °C junction, it is 1.5–2× higher. Recalculate with the hot value.
• Ignoring switching loss: At high frequencies (above ~50 kHz), switching loss often dominates. Use the real rise/fall times from the datasheet.
• Driving the gate with 3.3 V on a standard MOSFET: A part with V_GS(th) = 2–4 V will not fully enhance at 3.3 V, so R_DS(on) is much higher than the 10 V spec. Use a logic-level part or a higher gate voltage.
• Forgetting the body diode: In half-bridge or synchronous rectifier circuits, the body diode conducts during dead time. Its reverse recovery can cause extra loss and ringing. For high-frequency hard-switching, use a MOSFET with fast body diode or add external Schottky diodes.
• Not accounting for peak current: Inductive loads (motors, solenoids) can draw several times the steady-state current during startup or stall. Size the MOSFET for the peak, not the average.

Alternatives and When to Use Them

If a single MOSFET cannot handle the power loss, consider:

• Parallel MOSFETs: Two devices share the current, halving conduction loss (but not switching loss, and they can oscillate if not driven symmetrically). Use separate gate resistors.
• IGBT: Better for very high voltage (>200 V) and low frequency (<20 kHz) where conduction loss dominates. IGBTs have a fixed saturation voltage drop, so they do not benefit from paralleling as much.
• GaN (gallium nitride) FETs: Much lower gate charge and output capacitance, enabling higher switching frequencies with lower loss. More expensive and require careful layout.
• SiC (silicon carbide) MOSFETs: For high voltage (>600 V) and high temperature. Higher cost but excellent switching performance.

For a first prototype, a standard silicon MOSFET with a proper gate driver and adequate copper is usually the fastest and cheapest path.

Frequently Asked Questions

Q: What is the difference between a logic-level and standard MOSFET?
A: A logic-level MOSFET is designed to have low R_DS(on) at gate voltages like 2.5 V, 3.3 V, or 4.5 V, so it can be driven directly from a microcontroller. A standard MOSFET needs 10 V to achieve its rated R_DS(on); at 3.3 V it may not turn on fully and will dissipate excessive power.

Q: How do I choose the R_DS(on) for my application?
A: First estimate the allowable conduction loss (e.g., 1% of output power). Then R_DS(on) = P_COND / I_RMS². Multiply by 1.5–2 to account for hot operation, then pick a part with that resistance or lower at your gate voltage.

Q: Why does my MOSFET get hot even with no load?
A: If there is no load, the likely causes are: (1) the gate is not fully turned off (leakage or floating gate), (2) you are switching at high frequency and the output capacitance (C_oss) is being charged/discharged – this loss is P = 0.5 × C_oss × V² × f, and (3) the gate driver is oscillating due to layout inductance, causing the MOSFET to switch repeatedly.

Q: Can I use a MOSFET without a gate driver?
A: Yes, for very low frequency (<1 kHz) and small gate charge (Q_g < 10 nC), a microcontroller pin can work, but the switching will be slow and lossy. For anything above a few kHz or with a large MOSFET, a dedicated driver is recommended to avoid overheating and slow edges that cause EMI.

Q: What is the safe operating area (SOA) and why does it matter?
A: The SOA graph in the datasheet shows the combinations of drain current and drain-source voltage that the device can withstand for a given pulse width. During switching, the MOSFET briefly operates at high voltage and high current simultaneously; if you exceed the SOA, the device can fail instantly. For hard-switching, ensure the switching trajectory stays within the DC or pulsed SOA.

Q: How much margin should I leave on V_DS and current?
A: A common rule of thumb is 1.5–2× margin on voltage and 2× on current for inductive loads. This accounts for transients, temperature, and part-to-part variation. For automotive or industrial environments with harsh transients, use 2–3× voltage margin.

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in v_in | Input voltage | V | 12 | 0
in i_load | Load current | A | 5 | 0
in v_gs | Gate drive voltage | V | 10 | 0
in r_ds | R_DS(on) at V_gs | mΩ | 20 | 0
in f_sw | Switching frequency | kHz | 100 | 0
out p_cond | Conduction loss | W | i_load^2 * r_ds / 1000 | 2
out p_sw | Switching loss (est.) | W | 0.5 * v_in * i_load * (20 / f_sw) | 2
out p_tot | Total estimated loss | W | p_cond + p_sw | 2