STM32 CAN Bitrate Calculator & How to Use It

This page helps you calculate the correct CAN bus bitrate and bit timing parameters for an STM32 microcontroller. You enter your desired bitrate, clock source frequency, and sample point percentage, and it returns the prescaler, time segments, and the actual achieved bitrate. The calculator uses the standard CAN 2.0 bit timing formula from the STM32 reference manuals.

Formula

The CAN bit timing on STM32 is derived from the APB1 peripheral clock (often 36 MHz or 45 MHz on F1/F4 series, or 80 MHz on F7/H7). Each bit time is divided into time quanta (tq), and the bitrate is:

Bitrate = APB1 clock / (BRP × (Sync_Seg + Prop_Seg + Phase_Seg1 + Phase_Seg2))

Where:

• BRP – Baud rate prescaler (1 to 1024 on most STM32 CAN peripherals)
• Sync_Seg – always 1 time quantum
• Prop_Seg – propagation segment (1–8 tq)
• Phase_Seg1 – phase buffer segment 1 (1–8 tq)
• Phase_Seg2 – phase buffer segment 2 (1–8 tq)
• SJW – synchronization jump width (1–4 tq, not in the formula but affects tolerance)

The total number of time quanta per bit is the sum of all four segments. The sample point is (Sync_Seg + Prop_Seg + Phase_Seg1) / total tq × 100%. Typical values are 75% for high-speed CAN (1 Mbit/s) and 87.5% for low-speed (125 kbit/s).

Worked Example

Using the default values: APB1 clock = 36 MHz, desired bitrate = 500 kbit/s, sample point = 75%.

1. Calculate prescaler: BRP = round(36,000,000 / (500,000 × 16)) = round(4.5) = 5 (using 16 tq as a starting point).
2. Calculate actual tq per bit: tq = round(36,000,000 / (500,000 × 5)) = round(14.4) = 14.
3. Actual bitrate = 36,000,000 / (5 × 14) = 514,285 bit/s.
4. Error = |514,285 – 500,000| / 500,000 × 100 = 2.86%.

This error is too high for reliable CAN communication (typical tolerance is below 1%). You would need to adjust the tq count (try 15 tq) or choose a different prescaler. The calculator shows the error so you can iterate quickly.

How to Choose the Right Bit Timing

Selecting the correct bit timing involves a trade-off between the prescaler and the number of time quanta. More time quanta per bit give finer control over the sample point and better tolerance to oscillator drift, but they require a higher APB1 clock.

• Start with a target of 16 tq per bit (common for 500 kbit/s).
• Compute BRP = round(APB1_clock / (desired_bitrate × 16)).
• Then compute actual tq = round(APB1_clock / (desired_bitrate × BRP)).
• If the actual tq is not between 8 and 25, try a different BRP (e.g., BRP±1).
• Check that the error is below 0.5% for reliable operation.
• Finally, assign the tq values: Sync=1, Prop=1, Phase1 = (tq×sample_point/100) – 2, Phase2 = tq – Phase1 – 2.

For example, with 14 tq and 75% sample point: Phase1 = round(14×0.75) – 2 = 10.5 – 2 = 8.5 → round to 9? Actually you need integer values. The STM32 registers only allow 1–8 for Prop and Phase segments, so 14 tq is not feasible. You must choose a tq count that allows the segments to fit. Typical valid tq counts are 8, 10, 12, 14, 16, 18, 20, 22, 24, 25.

Common Mistakes and Misconceptions

A frequent mistake is using the system clock (e.g., 72 MHz) instead of the APB1 clock. The CAN peripheral is clocked from APB1, which is often divided by 2 from the system clock. On STM32F1, APB1 max is 36 MHz; on F4 it’s 42 MHz (or 45 MHz with overdrive); on F7/H7 it can be 50–100 MHz depending on the model.

Another misconception is that the sample point must be exactly 75% for all bitrates. In practice, 75% is common for 500 kbit/s and above, but for lower bitrates (125 kbit/s) many designs use 87.5% to improve tolerance to cable length. The STM32 CAN peripheral allows sample point from ~50% to ~90%.

Also, the synchronization jump width (SJW) is often forgotten. SJW should be at least 1 tq and typically 1–4 tq. A larger SJW improves tolerance to clock drift but reduces maximum bitrate. For 500 kbit/s with a 36 MHz clock, SJW=1 is typical.

Reading the Results and Verifying

The calculator gives you the prescaler and the actual bitrate. To verify that the values are valid for your STM32, check the following:

• BRP must be between 1 and 1024 (some STM32 have a 10-bit prescaler, others 12-bit).
• Total tq per bit must be between 8 and 25 (STM32F1/F4/F7 CAN peripheral).
• Each segment (Prop, Phase1, Phase2) must be between 1 and 8 tq.
• Sample point error should be below 5% relative to your target.

If the calculator returns a BRP or tq that is out of range, try a different APB1 clock (e.g., change the APB1 prescaler in your clock configuration) or accept a slightly different bitrate. Many CAN protocols tolerate up to 1% bitrate error, but for multi-node networks, keep it below 0.5%.

Limitations of the Formula

The formula assumes a perfect clock and ignores the physical layer (transceiver, cable length, termination). In real systems, the bit timing must also account for propagation delay on the bus. A rule of thumb is that the propagation segment should be at least 2× the bus round-trip delay. For a 40-meter cable at 500 kbit/s, a propagation segment of 2–3 tq is usually enough.

The calculator also assumes the standard CAN 2.0 bit timing. CAN FD (flexible data rate) uses a different, more complex timing scheme with separate data and arbitration phases. This calculator does not handle CAN FD; for CAN FD, use the STM32CubeMX tool or the reference manual’s formulas.

Finally, the actual STM32 registers (CAN_BTR) have specific bit fields. The prescaler is in bits 9–0, and the segments are in bits 19–16 (TS1), 22–20 (TS2), and 23 (SJW). The sample point is not directly programmed; it is a consequence of the segment values. Some STM32 HAL functions (HAL_CAN_ConfigBitTiming) accept the computed values directly.

Frequently Asked Questions

What is the maximum bitrate for STM32 CAN?

The maximum bitrate is 1 Mbit/s for standard CAN 2.0 on most STM32. Some newer STM32 (like G4 or H7) support CAN FD with data rates up to 5 Mbit/s, but the arbitration phase is still limited to 1 Mbit/s. The actual maximum depends on the APB1 clock and the minimum prescaler (1). For a 36 MHz APB1, the maximum bitrate is 36 MHz / (1 × 8) = 4.5 Mbit/s, but the CAN peripheral’s maximum is 1 Mbit/s, so it is capped.

Why does my CAN bus not work even though the bitrate is correct?

Bitrate is only one part. Common issues include missing 120-ohm termination resistors at both ends, incorrect sample point (especially with long cables), or a mismatch between the APB1 clock you think you have and the actual clock. Use the STM32CubeMX to verify the APB1 clock frequency, and check the error percentage from this calculator. Also ensure the CAN transceiver is properly wired and powered.

Can I use this calculator for CAN FD?

No. CAN FD uses a different bit timing with separate data phase and arbitration phase, and the prescaler can be different for each phase. This calculator is only for classic CAN 2.0. For CAN FD, use the STM32CubeMX CAN FD configuration or the reference manual’s formulas, which involve additional parameters like the data bitrate prescaler and data time segments.

What is the ideal sample point for 500 kbit/s?

For 500 kbit/s on a typical automotive bus, 75% is the most common. For industrial applications with shorter cables, 80% is also used. The sample point affects the bit timing tolerance; a later sample point (e.g., 87.5%) gives better tolerance to oscillator drift but requires more time quanta per bit. Always verify that the resulting segment values fit within the STM32’s 1–8 tq range.

How do I convert the prescaler and segments to STM32 register values?

The CAN_BTR register on STM32F1/F4/F7 has: BRP in bits 9:0, TS1 (Prop+Phase1) in bits 19:16 (value = TS1-1), TS2 (Phase2) in bits 22:20 (value = TS2-1), and SJW in bits 25:24 (value = SJW-1). For example, if BRP=5, TS1=10, TS2=3, SJW=1, the register value is (1<<24) | (2<<20) | (9<<16) | 5. The HAL function HAL_CAN_ConfigBitTiming takes a struct with these fields directly.

What if my APB1 clock is not a multiple of the desired bitrate?

You will get a bitrate error. For example, 36 MHz and 500 kbit/s gives an error of 2.86% with BRP=5 and tq=14, which is too high. In that case, you can either change the APB1 prescaler (e.g., set APB1 to 36 MHz, but use a different PLL configuration) or use a different bitrate (e.g., 250 kbit/s, which divides evenly). Many CAN protocols allow a tolerance of ±0.5%, so choose a combination that yields an error below that.

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in f | APB1 clock (Hz) | Hz | 36000000 | 0
in b | Desired bitrate (bit/s) | bit/s | 500000 | 0
in sp | Sample point (%) | % | 75 | 0
out brp | Prescaler (BRP) | - | max(1, round(f / (b * 16))) | 0
out tq | Time quanta per bit | - | round(f / (b * brp)) | 0
out actual | Actual bitrate | bit/s | f / (brp * tq) | 0
out error | Error (%) | % | abs(actual - b) / b * 100 | 2